1198 search results - page 75 / 240 » Compiling for EDGE Architectures |
HPCA
2007
IEEE
14 years 9 months ago
2007
IEEE
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of powe...
ASPLOS
2008
ACM
13 years 11 months ago
2008
ACM
The C programming language is at least as well known for its absence of spatial memory safety guarantees (i.e., lack of bounds checking) as it is for its high performance. C'...
EMSOFT
2005
Springer
14 years 2 months ago
2005
Springer
Power leakage constitutes an increasing fraction of the total power consumption in modern semiconductor technologies. Recent research efforts have tried to integrate architecture...
ICS
2004
Tsinghua U.
14 years 2 months ago
2004
Tsinghua U.
The Cray X1 was recently introduced as the first in a new line of parallel systems to combine high-bandwidth vector processing with an MPP system architecture. Alongside capabili...
APCSAC
2006
IEEE
14 years 3 months ago
2006
IEEE
Abstract. Instruction hints have become an important way to communicate compile-time information to the hardware. They can be generated by the compiler and the post-link optimizer ...