Current trends in processor design are pointing to deeper and wider pipelines and superscalar architectures. The efficient use of these resources requires speculative execution, ...
Dennis Lee, Jean-Loup Baer, Brad Calder, Dirk Grun...
Chip Multiprocessors (CMPs) are flexible, high-frequency platforms on which to support Thread-Level Speculation (TLS). However, for TLS to deliver on its promise, CMPs must explo...
Jose Renau, James Tuck, Wei Liu, Luis Ceze, Karin ...
Existing profile-guided partial redundancy elimination (PRE) methods use speculation to enable the removal of partial redundancies along more frequently executed paths at the expe...
VLIW processors are statically scheduled processors and their performance depends on the quality of the compiler’s scheduler. We propose a scheduling scheme where the applicatio...
Manvi Agarwal, S. K. Nandy, Jos T. J. van Eijndhov...