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CASES
2008
ACM
13 years 10 months ago
Exploring and predicting the architecture/optimising compiler co-design space
Embedded processor performance is dependent on both the underlying architecture and the compiler optimisations applied. However, designing both simultaneously is extremely difficu...
Christophe Dubach, Timothy M. Jones, Michael F. P....
IPPS
1999
IEEE
14 years 23 days ago
Implementing a Non-Strict Functional Programming Language on a Threaded Architecture
Abstract. The combination of a language with ne-grain implicit parallelism and a data ow evaluation scheme is suitable for high-level programming on massively parallel architectur...
Shigeru Kusakabe, Kentaro Inenaga, Makoto Amamiya,...
HPCA
2005
IEEE
14 years 8 months ago
Multithreaded Value Prediction
This paper introduces a novel technique which leverages value prediction and multithreading on a simultaneous multithreading processor to achieve higher performance in a single th...
Nathan Tuck, Dean M. Tullsen
MICRO
2007
IEEE
108views Hardware» more  MICRO 2007»
14 years 2 months ago
FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators
This paper describes FAST, a novel simulation methodology that can produce simulators that (i) are orders of magnitude faster than comparable simulators, (ii) are cycleaccurate, (...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...
CGO
2003
IEEE
14 years 1 months ago
Compiler Optimization-Space Exploration
To meet the performance demands of modern architectures, compilers incorporate an everincreasing number of aggressive code transformations. Since most of these transformations are...
Spyridon Triantafyllis, Manish Vachharajani, Neil ...