931 search results - page 57 / 187 » Compiling for vector-thread architectures |
114
Voted
ASAP
2007
IEEE
15 years 4 months ago
2007
IEEE
This paper presents the enhancement of an ASIP’s floating point performance by coupling of a co-processor and adding of special instructions. Processor hardware modifications an...
126
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SIGCOMM
2010
ACM
15 years 2 months ago
2010
ACM
We describe Currawong, a tool to perform system software architecture optimisation. Currawong is an extensible tool which applies optimisations at the point where an application i...
101
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FCCM
2005
IEEE
15 years 8 months ago
2005
IEEE
This paper presents a processor and memory-hierarchy prototype based on FPGAs that provides hardware support for program rollback. We use this prototype to demonstrate how compile...
113
Voted
CASES
2001
ACM
15 years 6 months ago
2001
ACM
In this paper we describe a design exploration methodology for clustered VLIW architectures. The central idea of this work is a set of three techniques aimed at reducing the cost ...
SE
2008
15 years 4 months ago
2008
: In many of today's application programs, security functionality is inseparably intertwined with the actual mission-purpose logic. As a result, the trusted code base is unnec...