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ICPR
2010
IEEE
14 years 1 months ago
A Meta-Learning Approach to Conditional Random Fields Using Error-Correcting Output Codes
—We present a meta-learning framework for the design of potential functions for Conditional Random Fields. The design of both node potential and edge potential is formulated as a...
Francesco Ciompi, Oriol Pujol, Petia Radeva
ICDE
2008
IEEE
150views Database» more  ICDE 2008»
14 years 9 months ago
Diagnosing Estimation Errors in Page Counts Using Execution Feedback
Errors in estimating page counts can lead to poor choice of access methods and in turn to poor quality plans. Although there is past work in using execution feedback for accurate c...
Surajit Chaudhuri, Vivek R. Narasayya, Ravishankar...
DATE
2005
IEEE
96views Hardware» more  DATE 2005»
14 years 1 months ago
DVS for On-Chip Bus Designs Based on Timing Error Correction
On-chip buses are typically designed to meet performance constraints at worst-case conditions, including process corner, temperature, IR-drop, and neighboring net switching patter...
Himanshu Kaul, Dennis Sylvester, David Blaauw, Tre...
DATE
2002
IEEE
154views Hardware» more  DATE 2002»
14 years 18 days ago
Low Power Error Resilient Encoding for On-Chip Data Buses
As technology scales toward deep submicron, on-chip interconnects are becoming more and more sensitive to noise sources such as power supply noise, crosstalk, radiation induced ef...
Davide Bertozzi, Luca Benini, Giovanni De Micheli
GLVLSI
2008
IEEE
150views VLSI» more  GLVLSI 2008»
13 years 7 months ago
Using unsatisfiable cores to debug multiple design errors
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
André Sülflow, Görschwin Fey, Rod...