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HPCA
2008
IEEE
14 years 2 months ago
Speculative instruction validation for performance-reliability trade-off
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal
DSN
2005
IEEE
14 years 1 months ago
Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files
Register files are in the critical path of most high-performance processors and their latency is one of the most important factors that limit their size. Our goal is to develop er...
Gokhan Memik, Masud H. Chowdhury, Arindam Mallik, ...
PRL
2010
173views more  PRL 2010»
13 years 6 months ago
Resolving stereo matching errors due to repetitive structures using model information
This study regards the problem of incorrect stereo matches due to the occurrence of repetitive structures in the scene. In stereo vision, repetitive structures may lead to “phan...
Björn Barrois, Marcus Konrad, Christian W&oum...
ICSE
2008
IEEE-ACM
14 years 8 months ago
jPredictor: a predictive runtime analysis tool for java
JPREDICTOR is a tool for detecting concurrency errors in JAVA programs. The JAVA program is instrumented to emit property-relevant events at runtime and then executed. The resulti...
Feng Chen, Traian-Florin Serbanuta, Grigore Rosu
DAC
2012
ACM
11 years 10 months ago
On software design for stochastic processors
Much recent research [8, 6, 7] suggests significant power and energy benefits of relaxing correctness constraints in future processors. Such processors with relaxed constraints ...
Joseph Sloan, John Sartori, Rakesh Kumar