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ICESS
2005
Springer
14 years 1 months ago
Self-correction of FPGA-Based Control Units
This paper presents a self-correcting control unit design using Hamming codes for finite state machine (FSM) state encoding. The adopted technique can correct single-bit errors and...
Iouliia Skliarova
DFT
2009
IEEE
139views VLSI» more  DFT 2009»
13 years 11 months ago
Reduced Precision Checking for a Floating Point Adder
We present an error detection technique for a floating point adder which uses a checker adder of reduced precision to determine if the result is correct within some error bound. O...
Patrick J. Eibl, Andrew D. Cook, Daniel J. Sorin
APCSAC
2004
IEEE
13 years 11 months ago
A Compiler-Assisted On-Chip Assigned-Signature Control Flow Checking
As device sizes continue shrinking, lower charges are needed to activate gates, and consequently ever smaller external events (such as single ionizing particles of naturally occurr...
Xiaobin Li, Jean-Luc Gaudiot
FDTC
2006
Springer
102views Cryptology» more  FDTC 2006»
13 years 11 months ago
Non-linear Residue Codes for Robust Public-Key Arithmetic
We present a scheme for robust multi-precision arithmetic over the positive integers, protected by a novel family of non-linear arithmetic residue codes. These codes have a very hi...
Gunnar Gaubatz, Berk Sunar, Mark G. Karpovsky
FCCM
2000
IEEE
131views VLSI» more  FCCM 2000»
14 years 2 days ago
A Reliable LZ Data Compressor on Reconfigurable Coprocessors
Data compression techniques based on Lempel-Ziv (LZ) algorithm are widely used in a variety of applications, especially in data storage and communications. However, since the LZ a...
Wei-Je Huang, Nirmal R. Saxena, Edward J. McCluske...