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DATE
2007
IEEE
150views Hardware» more  DATE 2007»
14 years 3 months ago
A low-SER efficient core processor architecture for future technologies
Device scaling in new and future technologies brings along severe increase in the soft error rate of circuits, for combinational and sequential logic. Although potential solutions...
Eduardo Luis Rhod, Carlos Arthur Lang Lisbôa...
CADE
2009
Springer
14 years 9 months ago
Complexity of Fractran and Productivity
Abstract. In functional programming languages the use of infinite structures is common practice. For total correctness of programs dealing with infinite structures one must guarant...
Clemens Grabmayer, Dimitri Hendriks, Jörg End...
SAC
2008
ACM
13 years 8 months ago
Adding background knowledge to formal concept analysis via attribute dependency formulas
We present a way to add user's background knowledge to formal concept analysis. The type of background knowledge we deal with relates to relative importance of attributes in ...
Radim Belohlávek, Vilém Vychodil
DAC
2006
ACM
14 years 9 months ago
NATURE: a hybrid nanotube/CMOS dynamically reconfigurable architecture
Recent progress on nanodevices, such as carbon nanotubes and nanowires, points to promising directions for future circuit design. However, nanofabrication techniques are not yet m...
Wei Zhang, Niraj K. Jha, Li Shang
ICTAC
2010
Springer
13 years 6 months ago
Mechanized Verification with Sharing
We consider software verification of imperative programs by theorem proving in higher-order separation logic. Of particular interest are the difficulties of encoding and reasoning ...
J. Gregory Malecha, Greg Morrisett