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Complexity Of Minimum-Delay Gate Resizing
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VLSID
2001
IEEE
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Complexity Of Minimum-Delay Gate Resizing
14 years 10 months ago
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Supratik Chakraborty, Rajeev Murgai
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ICCAD
1999
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Performance optimization under rise and fall parameters
14 years 2 months ago
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Typically,cell parameterssuch as the pin-to-pinintrinsicdelays, load-dependentcoe cients,andinputpin capacitanceshavedifferent values for rising and falling signals. The performan...
Rajeev Murgai
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