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ISCA
2000
IEEE
105views Hardware» more  ISCA 2000»
14 years 1 months ago
Multiple-banked register file architectures
The register file access time is one of the critical delays in current superscalar processors. Its impact on processor performance is likely to increase in future processor genera...
José-Lorenzo Cruz, Antonio González,...
EH
1999
IEEE
351views Hardware» more  EH 1999»
14 years 1 months ago
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
Marek A. Perkowski, Alan Mishchenko, Anatoli N. Ch...
DATE
1998
IEEE
114views Hardware» more  DATE 1998»
14 years 1 months ago
Design Of Future Systems
Near-future linac projects put yet unreached requirements on the LLRF control hardware in both performance and manageability. Meeting their field stability targets requires a clea...
Ian Page
HPCA
1996
IEEE
14 years 28 days ago
A Comparison of Entry Consistency and Lazy Release Consistency Implementations
This paper compares several implementations of entry consistency (EC) and lazy release consistency (LRC), two relaxed memory models in use with software distributed shared memory ...
Sarita V. Adve, Alan L. Cox, Sandhya Dwarkadas, Ra...
STOC
2010
ACM
269views Algorithms» more  STOC 2010»
14 years 26 days ago
Approximations for the Isoperimetric and Spectral Profile of Graphs and Related Parameters
The spectral profile of a graph is a natural generalization of the classical notion of its Rayleigh quotient. Roughly speaking, given a graph G, for each 0 < < 1, the spect...
Prasad Raghavendra, David Steurer and Prasad Tetal...