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» Complexity-Effective Superscalar Processors
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ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
14 years 24 days ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...
ISCA
2003
IEEE
88views Hardware» more  ISCA 2003»
14 years 24 days ago
Dynamically Managing the Communication-Parallelism Trade-off in Future Clustered Processors
Clustered microarchitectures are an attractive alternative to large monolithic superscalar designs due to their potential for higher clock rates in the face of increasingly wire-d...
Rajeev Balasubramonian, Sandhya Dwarkadas, David H...
DATE
2000
IEEE
113views Hardware» more  DATE 2000»
13 years 12 months ago
Static Timing Analysis of Embedded Software on Advanced Processor Architectures
This paper examines several techniques for static timing analysis. In detail, the first part of the paper analyzes the connection of prediction accuracy (worst case execution tim...
André Hergenhan, Wolfgang Rosenstiel
DSD
2004
IEEE
126views Hardware» more  DSD 2004»
13 years 11 months ago
Implicit vs. Explicit Resource Allocation in SMT Processors
In a Simultaneous Multithreaded (SMT) architecture, the front end of a superscalar is adapted in order to be able to fetch from several threads while the back end is shared among ...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...
IPPS
1998
IEEE
13 years 11 months ago
A Clustered Approach to Multithreaded Processors
With aggressive superscalar processors delivering diminishing returns, alternate designs that make good use of the increasing chip densities are actively being explored. One such ...
Venkata Krishnan, Josep Torrellas