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DAC
1998
ACM
14 years 8 months ago
Functional Vector Generation for HDL Models Using Linear Programming and 3-Satisfiability
Abstract-Our strategy for automatic generation of functional vectors is based on exercising selected paths in the given hardware description language (HDL) model. The HDL model des...
Farzan Fallah, Srinivas Devadas, Kurt Keutzer
VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
14 years 8 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
ACE
2004
218views Education» more  ACE 2004»
13 years 9 months ago
Executable/Translatable UML in Computing Education
The Unified Modelling Language (UML) is a diagrammatic notation widely used in the computing industry and often taught in universities as a way to represent software requirements ...
Shayne Flint, Henry Gardner, Clive Boughton
ENTCS
2006
109views more  ENTCS 2006»
13 years 7 months ago
Specifications via Realizability
We present a system, called RZ, for automatic generation of program specifications from mathematical theories. We translate mathematical theories to specifications by computing th...
Andrej Bauer, Christopher A. Stone
ICFP
2005
ACM
14 years 7 months ago
A logical analysis of aliasing in imperative higher-order functions
We present a compositional program logic for call-by-value imperative higher-order functions with general forms of aliasing, which can arise from the use of reference names as fun...
Martin Berger, Kohei Honda, Nobuko Yoshida