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» Composable Lightweight Processors
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CASES
2006
ACM
14 years 1 months ago
High-level power analysis for multi-core chips
Technology trends have led to the advent of multi-core chips in the form of both general-purpose chip multiprocessors (CMPs) and embedded multi-processor systems-on-a-chip (MPSoCs...
Noel Eisley, Vassos Soteriou, Li-Shiuan Peh
SIGARCH
2008
97views more  SIGARCH 2008»
13 years 7 months ago
SP-NUCA: a cost effective dynamic non-uniform cache architecture
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
Javier Merino, Valentin Puente, Pablo Prieto, Jos&...
TCAD
2002
104views more  TCAD 2002»
13 years 7 months ago
An instruction-level energy model for embedded VLIW architectures
In this paper, an instruction-level energy model is proposed for the data-path of very long instruction word (VLIW) pipelined processors that can be used to provide accurate power ...
Mariagiovanna Sami, Donatella Sciuto, Cristina Sil...
ISCA
2011
IEEE
486views Hardware» more  ISCA 2011»
12 years 11 months ago
Dark silicon and the end of multicore scaling
Since 2005, processor designers have increased core counts to exploit Moore’s Law scaling, rather than focusing on single-core performance. The failure of Dennard scaling, to wh...
Hadi Esmaeilzadeh, Emily R. Blem, Renée St....
WWW
2005
ACM
14 years 8 months ago
Building adaptable and reusable XML applications with model transformations
We present an approach in which the semantics of an XML language is defined by means of a transformation from an XML document model (an XML schema) to an application specific mode...
Ivan Kurtev, Klaas van den Berg