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IEEEPACT
2007
IEEE
14 years 3 months ago
A Flexible Heterogeneous Multi-Core Architecture
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
Miquel Pericàs, Adrián Cristal, Fran...
IEEEPACT
2007
IEEE
14 years 3 months ago
Performance Portable Optimizations for Loops Containing Communication Operations
Effective use of communication networks is critical to the performance and scalability of parallel applications. Partitioned Global Address Space languages like UPC bring the pro...
Costin Iancu, Wei Chen, Katherine A. Yelick
ISBI
2007
IEEE
14 years 3 months ago
Validation of Optical-Flow for Quantification of Myocardial Deformations on Simulated Rt3d Ultrasound
Quantitative analysis of cardiac motion is of great clinical interest in assessing ventricular function. Real-time 3-D (RT3D) ultrasound transducers provide valuable fourdimension...
Qi Duan, Elsa D. Angelini, Shunichi Homma, Andrew ...
ISCA
2007
IEEE
152views Hardware» more  ISCA 2007»
14 years 3 months ago
Carbon: architectural support for fine-grained parallelism on chip multiprocessors
Chip multiprocessors (CMPs) are now commonplace, and the number of cores on a CMP is likely to grow steadily. However, in order to harness the additional compute resources of a CM...
Sanjeev Kumar, Christopher J. Hughes, Anthony D. N...
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
14 years 3 months ago
Hardware atomicity for reliable software speculation
Speculative compiler optimizations are effective in improving both single-thread performance and reducing power consumption, but their implementation introduces significant compl...
Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, ...
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