Sciweavers

333 search results - page 43 / 67
» Computation with Absolutely No Space Overhead
Sort
View
ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
13 years 12 months ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...
ASPLOS
2010
ACM
14 years 4 months ago
Accelerating the local outlier factor algorithm on a GPU for intrusion detection systems
The Local Outlier Factor (LOF) is a very powerful anomaly detection method available in machine learning and classification. The algorithm defines the notion of local outlier in...
Malak Alshawabkeh, Byunghyun Jang, David R. Kaeli
MOBIHOC
2007
ACM
14 years 9 months ago
A random perturbation-based scheme for pairwise key establishment in sensor networks
A prerequisite for secure communications between two sensor nodes is that these nodes exclusively share a pairwise key. Although numerous pairwise key establishment (PKE) schemes ...
Wensheng Zhang, Minh Tran, Sencun Zhu, Guohong Cao
CLUSTER
2006
IEEE
14 years 3 months ago
Designing High Performance and Scalable MPI Intra-node Communication Support for Clusters
As new processor and memory architectures advance, clusters start to be built from larger SMP systems, which makes MPI intra-node communication a critical issue in high performanc...
Lei Chai, Albert Hartono, Dhabaleswar K. Panda
HPCA
2002
IEEE
14 years 10 months ago
A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning
We propose a low overhead, on-line memory monitoring scheme utilizing a set of novel hardware counters. The counters act like pressure gauges indicating the marginal gain in the n...
G. Edward Suh, Srinivas Devadas, Larry Rudolph