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ICS
2007
Tsinghua U.
14 years 2 months ago
Optimization of data prefetch helper threads with path-expression based statistical modeling
This paper investigates helper threads that improve performance by prefetching data on behalf of an application’s main thread. The focus is data prefetch helper threads that lac...
Tor M. Aamodt, Paul Chow
DAC
2005
ACM
13 years 10 months ago
Efficient and accurate gate sizing with piecewise convex delay models
We present an efficient and accurate gate sizing tool that employs a novel piecewise convex delay model, handling both rise and fall delays, for static CMOS gates. The delay model...
Hiran Tennakoon, Carl Sechen
IEEEPACT
2003
IEEE
14 years 1 months ago
Design Trade-Offs in High-Throughput Coherence Controllers
Recent research shows that the high occupancy of Coherence Controllers (CCs) is a major performance bottleneck in scalable shared-memory multiprocessors. In this paper, we propose...
Anthony-Trung Nguyen, Josep Torrellas
BMCBI
2005
130views more  BMCBI 2005»
13 years 7 months ago
Squid - a simple bioinformatics grid
Background: BLAST is a widely used genetic research tool for analysis of similarity between nucleotide and protein sequences. This paper presents a software application entitled &...
Paulo C. Carvalho, Rafael V. Glória, Antoni...
ARITH
1999
IEEE
14 years 8 days ago
Reduced Latency IEEE Floating-Point Standard Adder Architectures
The design and implementation of a double precision floating-point IEEE-754 standard adder is described which uses "flagged prefix addition" to merge rounding with the s...
Andrew Beaumont-Smith, Neil Burgess, S. Lefrere, C...