353 search results - page 26 / 71 » Computational Intelligence in Circuit Synthesis |
CIMCA
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper describes an innovative work for nanorobot design and manufacturing, using a computer simulation and system on chip prototyping approach. The use of CMOS as integrated ...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
ICPIA
1992
14 years 23 days ago
1992
:: This talk deals with fundamental aspects of Intelligent Pattern Recognition (IPR) and applications. It basically includes the following: Overview of 3D Biometric Technology and ...
DAC
2003
ACM
14 years 1 months ago
2003
ACM
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
ISPD
2005
ACM
14 years 2 months ago
2005
ACM
Placement is a critical component of today's physical synthesis flow with tremendous impact on the final performance of VLSI designs. However, it accounts for a significant p...