Manufacturing disturbances are inevitable in the fabrication of integrated circuits. These disturbances will result in variations in the delay specications of manufactured circui...
—We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. Optimizations at the circuit, logic, architectural and system levels are cons...
STGs give a formalism for the description of asynchronous circuits based on Petri nets. To overcome the state explosion problem one may encounter during circuit synthesis, a nondet...
In this paper a new Toffoli gate cascade synthesis method is presented. This method is based on previous work [12] and generates a cascade of inverted-control-Toffoli gates from t...