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TVLSI
2010
13 years 3 months ago
Discrete Buffer and Wire Sizing for Link-Based Non-Tree Clock Networks
Clock network is a vulnerable victim of variations as well as a main power consumer in many integrated circuits. Recently, link-based non-tree clock network attracts people's...
Rupak Samanta, Jiang Hu, Peng Li
ICIP
2007
IEEE
14 years 25 days ago
H.263 to H.264 Transconding using Data Mining
1 In this paper, we propose the use of data mining algorithms to create a macroblock partition mode decision algorithm for inter-frame prediction, to be used as part of a high-effi...
Gerardo Fernández-Escribano, Jens Bialkowsk...
CIARP
2006
Springer
14 years 21 days ago
A New Approach to Multi-class Linear Dimensionality Reduction
Linear dimensionality reduction (LDR) is quite important in pattern recognition due to its efficiency and low computational complexity. In this paper, we extend the two-class Chern...
Luis Rueda, Myriam Herrera
PACS
2000
Springer
110views Hardware» more  PACS 2000»
14 years 17 days ago
Compiler-Directed Dynamic Frequency and Voltage Scheduling
Dynamic voltage and frequency scaling has been identified as one of the most effective ways to reduce power dissipation. This paper discusses a compilation strategy that identifies...
Chung-Hsing Hsu, Ulrich Kremer, Michael S. Hsiao
NIPS
2004
13 years 10 months ago
Triangle Fixing Algorithms for the Metric Nearness Problem
Various problems in machine learning, databases, and statistics involve pairwise distances among a set of objects. It is often desirable for these distances to satisfy the propert...
Inderjit S. Dhillon, Suvrit Sra, Joel A. Tropp