Sciweavers

671 search results - page 107 / 135
» Computer Aided Modelling Exercises
Sort
View
116
Voted
DAC
1994
ACM
15 years 6 months ago
Error Diagnosis for Transistor-Level Verification
This paper describes a diagnosis technique for locating design errors in circuit implementations which do not match their functional specification. The method efficiently propagat...
Andreas Kuehlmann, David Ihsin Cheng, Arvind Srini...
DAC
2007
ACM
15 years 6 months ago
A Framework for the Validation of Processor Architecture Compliance
We present a framework for validating the compliance of a design with a given architecture. Our approach is centered on the concept of misinterpretations. These include missing be...
Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jae...
128
Voted
DAC
2010
ACM
15 years 6 months ago
Representative path selection for post-silicon timing prediction under variability
The identification of speedpaths is required for post-silicon (PS) timing validation, and it is currently becoming timeconsuming due to manufacturing variations. In this paper we...
Lin Xie, Azadeh Davoodi
218
Voted
ACL2
2006
ACM
15 years 6 months ago
Combining ACL2 and an automated verification tool to verify a multiplier
We have extended the ACL2 theorem prover to automatically prove properties of VHDL circuits with IBM's Internal SixthSense verification system. We have used this extension to...
Erik Reeber, Jun Sawada
133
Voted
DLOG
2008
15 years 4 months ago
Fuzzy Description Logics for Bilateral Matchmaking in e-Marketplaces
We present a novel Fuzzy Description Logic (DL) based approach to automate matchmaking in e-marketplaces. We model traders' preferences with the aid of Fuzzy DLs and, given a ...
Azzurra Ragone, Umberto Straccia, Fernando Bobillo...