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ISQED
2005
IEEE
98views Hardware» more  ISQED 2005»
14 years 1 months ago
Wire Planning with Bounded Over-the-Block Wires
Hierarchical approach greatly facilitates large-scale chip design by hiding distracting details in low-level objects. However, the lowlevel designs have to have a global view of h...
Hua Xiang, I-Min Liu, Martin D. F. Wong
DAC
2005
ACM
14 years 8 months ago
A new canonical form for fast boolean matching in logic synthesis and verification
? An efficient and compact canonical form is proposed for the Boolean matching problem under permutation and complementation of variables. In addition an efficient algorithm for co...
Afshin Abdollahi, Massoud Pedram
CORR
2011
Springer
192views Education» more  CORR 2011»
13 years 2 months ago
On cooperative patrolling: optimal trajectories, complexity analysis, and approximation algorithms
—The subject of this work is the patrolling of an environment with the aid of a team of autonomous agents. We consider both the design of open-loop trajectories with optimal prop...
Fabio Pasqualetti, Antonio Franchi, Francesco Bull...
DAC
2006
ACM
14 years 8 months ago
Design automation for DNA self-assembled nanostructures
DNA self-assembly is an emerging technology with potential as a future replacement of conventional lithographic fabrication. A key challenge is the specification of appropriate DN...
Constantin Pistol, Alvin R. Lebeck, Chris Dwyer
CODES
2005
IEEE
14 years 1 months ago
Key research problems in NoC design: a holistic perspective
Networks-on-Chip (NoCs) have been recently proposed as a promising solution to complex on-chip communication problems. The lack of an unified representation of applications and ar...
Ümit Y. Ogras, Jingcao Hu, Radu Marculescu