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    FPL
    1994
    Springer
    88views Hardware» more  FPL 1994»
    FPGA Technology Mapping for Power Minimization
    13 years 11 months ago
    FPGA Technology Mapping for Power Minimization
    Download  csrl.unt.edu
    Amir H. Farrahi, Majid Sarrafzadeh
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    IJBC
    2008
    54views more  IJBC 2008»
    A Minimal 2-d Quadratic Map with Quasi-Periodic Route to Chaos
    13 years 7 months ago
    A Minimal 2-d Quadratic Map with Quasi-Periodic Route to Chaos
    Download  sprott.physics.wisc.edu
    Zeraoulia Elhadj, Julien Clinton Sprott
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    TOG
    2002
    80views more  TOG 2002»
    Smoothing an overlay grid to minimize linear distortion in texture mapping
    13 years 7 months ago
    Smoothing an overlay grid to minimize linear distortion in texture mapping
    Download  www.math.vt.edu
    Alla Sheffer, Eric de Sturler
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    HOTOS
    2009
    IEEE
    134views Operating System» more  HOTOS 2009»
    On Availability of Intermediate Data in Cloud Computations
    13 years 11 months ago
    On Availability of Intermediate Data in Cloud Computations
    Download  kepler.cs.uiuc.edu
    This paper takes a renewed look at the problem of managing intermediate data that is generated during dataflow computations (e.g., MapReduce, Pig, Dryad, etc.) within clouds. We d...
    Steven Y. Ko, Imranul Hoque, Brian Cho, Indranil G...
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    ICCAD
    1994
    IEEE
    131views Hardware» more  ICCAD 1994»
    Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
    13 years 11 months ago
    Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
    Download  www.cs.york.ac.uk
    We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
    Hannah Honghua Yang, D. F. Wong
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