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ISCA
2008
IEEE
134views Hardware» more  ISCA 2008»
14 years 5 months ago
Flexible Decoupled Transactional Memory Support
A high-concurrency transactional memory (TM) implementation needs to track concurrent accesses, buffer speculative updates, and manage conflicts. We present a system, FlexTM (FLE...
Arrvindh Shriraman, Sandhya Dwarkadas, Michael L. ...
PPDP
2007
Springer
14 years 4 months ago
Unfolding in CHR
Program transformation is an appealing technique which allows to improve run-time efficiency, space-consumption and more generally to optimize a given program. Essentially it con...
Paolo Tacchella, Maurizio Gabbrielli, Maria Chiara...
CODES
2005
IEEE
14 years 4 months ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...
IFM
2004
Springer
175views Formal Methods» more  IFM 2004»
14 years 4 months ago
State/Event-Based Software Model Checking
Abstract. We present a framework for model checking concurrent software systems which incorporates both states and events. Contrary to other state/event approaches, our work also i...
Sagar Chaki, Edmund M. Clarke, Joël Ouaknine,...
ICPP
1999
IEEE
14 years 3 months ago
An Offline Algorithm for Dimension-Bound Analysis
The vector-clock size necessary to characterize causality in a distributed computation is bounded by the dimension of the partial order induced by that computation. In an arbitrar...
Paul A. S. Ward