14 search results - page 1 / 3 » Concurrent Error Detection in Self-Timed VLSI |
FTCS
1994
14 years 7 months ago
1994
This paper examines architectural techniques for providing concurrent error detection in self-timed VLSI pipelines. Signal pairs from Differential Cascode Voltage Switch Logic are...
DFT
2002
IEEE
14 years 11 months ago
2002
IEEE
Concurrent error detection (CED) methods are typically employed to provide an indication of the operational health of synchronous circuits during normal functionality. Existing CE...
DFT
2008
IEEE
14 years 7 months ago
2008
IEEE
This paper presents a concurrent error detection technique for the control logic of a modern microprocessor. Our method is based on execution time prediction for each instruction ...
DFT
1997
IEEE
14 years 10 months ago
1997
IEEE
Abstract— Error control is a major concern in many computer systems, particularly those deployed in critical applications. Experience shows that most malfunctions during system o...
DFT
2003
IEEE
14 years 11 months ago
2003
IEEE
We discuss the use of convolutional codes to perform concurrent error detection (CED) in finite state machines (FSMs). We examine a previously proposed methodology, we identify i...