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» Concurrent Methodologies for Global Optimization
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VLSID
2002
IEEE
87views VLSI» more  VLSID 2002»
14 years 9 months ago
Simultaneous Circuit Transformation and Routing
In this paper, we propose a new methodology to integrate circuit transformation into routing. More specifically, this paper shows an approach for performing routing and wire recon...
Hiroaki Yoshida, Motohiro Sera, Masao Kubo, Masahi...
ICCD
2004
IEEE
107views Hardware» more  ICCD 2004»
14 years 5 months ago
Network-on-Chip: The Intelligence is in The Wire
In this paper we describe how Network-on-Chip (NoC) will be the next major challenge to implementing complex and function-rich applications in advanced manufacturing processes at ...
Gérard Mas, Philippe Martin
ISCAS
2007
IEEE
123views Hardware» more  ISCAS 2007»
14 years 2 months ago
Low-Power Low-Voltage Hot-Spot Tolerant Clocking with Suppressed Skew
— A methodology based on supply voltage optimization for lowering the power consumption and temperature fluctuations induced skew of clock distribution networks is proposed in th...
Sherif A. Tawfik, Volkan Kursun
GECCO
2007
Springer
185views Optimization» more  GECCO 2007»
14 years 2 months ago
An informed convergence accelerator for evolutionary multiobjective optimiser
A novel optimisation accelerator deploying neural network predictions and objective space direct manipulation strategies is presented. The concept of directing the search through ...
Salem F. Adra, Ian Griffin, Peter J. Fleming
DAC
1994
ACM
14 years 21 days ago
The Design of High-Performance Microprocessors at Digital
Today's high-performance single-chip CMOS microprocessors are the most complex and challenging chip designs ever implemented. To stay on the leading edge, Digital's micro...
Thomas F. Fox