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DATE
1999
IEEE
120views Hardware» more  DATE 1999»
15 years 6 months ago
FreezeFrame: Compact Test Generation Using a Frozen Clock Strategy
Test application time is an important factor in the overall cost of VLSI chip testing. We present a new ATPG approach for generating compact test sequences for sequential circuits...
Yanti Santoso, Matthew C. Merten, Elizabeth M. Rud...
DATE
1997
IEEE
100views Hardware» more  DATE 1997»
15 years 6 months ago
On the generation of pseudo-deterministic two-patterns test sequence with LFSRs
Many Built-In Self Test pattern generators use Linear Feedback Shift Registers (LFSR) to generate test sequences. In this paper, we address the generation of deterministic pairs o...
Christian Dufaza, Yervant Zorian
ACL
2006
15 years 3 months ago
FAST - An Automatic Generation System for Grammar Tests
This paper introduces a method for the semi-automatic generation of grammar test items by applying Natural Language Processing (NLP) techniques. Based on manually-designed pattern...
Chia-Yin Chen, Hsien-Chin Liou, Jason S. Chang
DATE
2009
IEEE
94views Hardware» more  DATE 2009»
15 years 9 months ago
Improving compressed test pattern generation for multiple scan chain failure diagnosis
To reduce test data volumes, encoded tests and compacted test responses are widely used in industry. Use of test response compaction negatively impacts fault diagnosis since the e...
Xun Tang, Ruifeng Guo, Wu-Tung Cheng, Sudhakar M. ...
ASPLOS
2010
ACM
15 years 9 months ago
ConMem: detecting severe concurrency bugs through an effect-oriented approach
Multicore technology is making concurrent programs increasingly pervasive. Unfortunately, it is difficult to deliver reliable concurrent programs, because of the huge and non-det...
Wei Zhang, Chong Sun, Shan Lu