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VLSID
2003
IEEE
114views VLSI» more  VLSID 2003»
14 years 10 months ago
Substrate Bias Effect on Cycling Induced Performance Degradation of Flash EEPROMs
Cycling induced performance degradation of flash EEPROMs has been reported for VB=0 and VB<0 programming operation. Compared to VB=0, VB<0 programming shows lower interface ...
S. Mahapatra, S. Shukuri, Jeff Bude
DATE
2000
IEEE
121views Hardware» more  DATE 2000»
14 years 2 months ago
Composite Signal Flow: A Computational Model Combining Events, Sampled Streams, and Vectors
The composite signal flow model of computation targets systems with significant control and data processing parts. It builds on the data flow and synchronous data flow models ...
Axel Jantsch, Per Bjuréus
COCO
2005
Springer
106views Algorithms» more  COCO 2005»
14 years 3 months ago
The Complexity of the Inertia and Some Closure Properties of GapL
The inertia of an n × n matrix A is defined as the triple (i+(A), i−(A), i0(A)), where i+(A), i−(A), and i0(A) are the number of eigenvalues of A, counting multiplicities, w...
Thanh Minh Hoang, Thomas Thierauf
ISMIS
2005
Springer
14 years 3 months ago
A Query Expression and Processing Technique for an XML Search Engine
Abstract. One of the virtues of XML is that it allows complex structures to be easily expressed. This allows XML to be used as an intermediate, neutral, and standard form for repre...
Wol-Young Lee, Hwan-Seung Yong
RULEML
2005
Springer
14 years 3 months ago
Nested Rules in Defeasible Logic
Defeasible Logic is a rule-based non-monotonic logic with tractable reasoning services. In this paper we extend Defeasible Logic with nested rules. We consider a new Defeasible Log...
Insu Song, Guido Governatori