734 search results - page 84 / 147 » Configurable Transactional Memory |
AHS
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents a new approach in realizing Virtual Channels tailored for Network on Chip implementations. The technique makes use of a flow control mechanism based on adaptiv...
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper introduces a finite memory compactor called convolutional compactor that provides compaction ratios of test responses in excess of 100x even for a very small number of ...
MICRO
2008
IEEE
13 years 8 months ago
2008
IEEE
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
SIGMOD
2009
ACM
14 years 9 months ago
2009
ACM
The past few decades have witnessed a chronic and widening imbalance among processor bandwidth, disk capacity, and access speed of disk. According to Amdhal's law, the perfor...
IEEEPACT
2006
IEEE
14 years 2 months ago
2006
IEEE
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can lead to critical information leakage such as encryp...