202 search results - page 5 / 41 » Configuration Caching Management Techniques for Reconfigurab... |
MICRO
2000
IEEE
13 years 11 months ago
2000
IEEE
Conventional microarchitectures choose a single memory hierarchy design point targeted at the average application. In this paper, we propose a cache and TLB layout and design that...
CONCURRENCY
2006
13 years 7 months ago
2006
Significant progress has been made in the design and development of Grid middleware which, in its present form, is founded on service-oriented architecture and web services techno...
IPPS
2003
IEEE
14 years 23 days ago
2003
IEEE
This paper presents a technique, called loop dissevering, to temporally partitioning any type of loop presented in programming languages. The technique can be used in the presence...
GECCO
2009
Springer
13 years 5 months ago
2009
Springer
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
ICRA
2006
IEEE
14 years 1 months ago
2006
IEEE
– To make a mobile robot with real-time vision system adapt to the highly dynamic environments and emergencies under the real-time constraints, a significant account of processin...