Sciweavers

606 search results - page 116 / 122
» Constraint Hierarchies and Logic Programming
Sort
View
ISQED
2008
IEEE
186views Hardware» more  ISQED 2008»
14 years 2 months ago
Reliability-Aware Optimization for DVS-Enabled Real-Time Embedded Systems
—Power and energy consumption has emerged as the premier and most constraining aspect in modern computational systems. Dynamic Voltage Scheduling (DVS) has been provably one of t...
Foad Dabiri, Navid Amini, Mahsan Rofouei, Majid Sa...
CP
1998
Springer
13 years 12 months ago
Generation of Test Patterns for Differential Diagnosis of Digital Circuits
In a faulty digital circuit, many (single) faulty gates may explain the observed findings. In this paper we are mostly concerned, not in obtaining alternative diagnoses, but rathe...
Francisco Azevedo, Pedro Barahona
DAC
2005
ACM
13 years 9 months ago
VLIW: a case study of parallelism verification
Parallelism in processor architecture and design imposes a verification challenge as the exponential growth in the number of execution combinations becomes unwieldy. In this paper...
Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Li...
CADE
2006
Springer
14 years 8 months ago
Stratified Context Unification Is NP-Complete
Context Unification is the problem to decide for a given set of second-order equations E where all second-order variables are unary, whether there exists a unifier, such that for e...
Jordi Levy, Manfred Schmidt-Schauß, Mateu Vi...
COCOA
2007
Springer
14 years 1 months ago
On Threshold BDDs and the Optimal Variable Ordering Problem
Abstract. Many combinatorial optimization problems can be formulated as 0/1 integer programs (0/1 IPs). The investigation of the structure of these problems raises the following ta...
Markus Behle