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HPCA
2006
IEEE
14 years 10 months ago
A decoupled KILO-instruction processor
Building processors with large instruction windows has been proposed as a mechanism for overcoming the memory wall, but finding a feasible and implementable design has been an elu...
Miquel Pericàs, Adrián Cristal, Rube...
CVPR
2009
IEEE
14 years 4 months ago
Understanding videos, constructing plots learning a visually grounded storyline model from annotated videos
Analyzing videos of human activities involves not only recognizing actions (typically based on their appearances), but also determining the story/plot of the video. The storyline ...
Abhinav Gupta, Praveen Srinivasan, Jianbo Shi, Lar...
ICPPW
2006
IEEE
14 years 4 months ago
Multidimensional Dataflow-based Parallelization for Multimedia Instruction Set Extensions
In retargeting loop-based code for multimedia instruction set extensions, a critical issue is that vector data types of mixed precision within a loop body complicate the paralleli...
Lewis B. Baumstark Jr., Linda M. Wills
ICCAD
1998
IEEE
95views Hardware» more  ICCAD 1998»
14 years 2 months ago
Efficient analog circuit synthesis with simultaneous yield and robustness optimization
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
Geert Debyser, Georges G. E. Gielen
ISCI
2008
145views more  ISCI 2008»
13 years 10 months ago
Aggregation in sensor networks with a user-provided quality of service goal
Significant research has been devoted to aggregation in sensor networks with a view to optimize its performance. Existing research has mostly concentrated on maximizing network li...
Zhen He, Byung Suk Lee, Xiaoyang Sean Wang