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» Constraint modules: An introduction
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DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 2 months ago
FACTOR: A Hierarchical Methodology for Functional Test Generation and Testability Analysis
This paper develops an improved approach for hierarchical functional test generation for complex chips. In order to deal with the increasing complexity of functional test generati...
Vivekananda M. Vedula, Jacob A. Abraham
TIT
2008
65views more  TIT 2008»
13 years 9 months ago
Power-Efficient Resource Allocation for Time-Division Multiple Access Over Fading Channels
We investigate resource allocation policies for time-division multiple access (TDMA) over fading channels in the power-limited regime. For frequency-flat block-fading channels and ...
Xin Wang, Georgios B. Giannakis
DAC
2009
ACM
14 years 11 months ago
O-Router:an optical routing framework for low power on-chip silicon nano-photonic integration
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
WWW
2005
ACM
14 years 10 months ago
WEBCAP: a capacity planning tool for web resource management
A staggering number of multimedia applications are being introduced every day. Yet, the inordinate delays encountered in retrieving multimedia documents make it difficult to use t...
Sami Habib, Maytham Safar
ICCAD
2006
IEEE
93views Hardware» more  ICCAD 2006»
14 years 6 months ago
Precise identification of the worst-case voltage drop conditions in power grid verification
– Identifying worst-case voltage drop conditions in every module supplied by the power grid is a crucial problem in modern IC design. In this paper we develop a novel methodology...
Nestoras E. Evmorfopoulos, Dimitris P. Karampatzak...