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    IPPS
    2010
    IEEE
    154views Distributed And Parallel Com...» more  IPPS 2010»
    Dynamic analysis of the relay cache-coherence protocol for distributed transactional memory
    13 years 5 months ago
    Dynamic analysis of the relay cache-coherence protocol for distributed transactional memory
    Download  www.real-time.ece.vt.edu
    Transactional memory is an alternative programming model for managing contention in accessing shared in-memory data objects. Distributed transactional memory (TM) promises to alle...
    Bo Zhang, Binoy Ravindran
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    RTSS
    2009
    IEEE
    206views Control Systems» more  RTSS 2009»
    Timing Analysis of Concurrent Programs Running on Shared Cache Multi-Cores
    14 years 2 months ago
    Timing Analysis of Concurrent Programs Running on Shared Cache Multi-Cores
    Download  www.comp.nus.edu.sg
    —Memory accesses form an important source of timing unpredictability. Timing analysis of real-time embedded software thus requires bounding the time for memory accesses. Multipro...
    Yan Li, Vivy Suhendra, Yun Liang, Tulika Mitra, Ab...
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    ALGORITHMICA
    2010
    136views more  ALGORITHMICA 2010»
    A Timing Assumption and Two t-Resilient Protocols for Implementing an Eventual Leader Service in Asynchronous Shared Memory Syst
    13 years 4 months ago
    A Timing Assumption and Two t-Resilient Protocols for Implementing an Eventual Leader Service in Asynchronous Shared Memory Syst
    Download  www.net.t-labs.tu-berlin.de
    Antonio Fernández, Ernesto Jiménez, ...
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    SRDS
    2006
    IEEE
    88views Operating System» more  SRDS 2006»
    Reducing the Availability Management Overheads of Federated Content Sharing Systems
    14 years 1 months ago
    Reducing the Availability Management Overheads of Federated Content Sharing Systems
    Download  www.cs.rutgers.edu
    We consider the problem of ensuring high data availability in federated content sharing systems. Ideally, such a system would provide high data availability in a device transparen...
    Christopher Peery, Thu D. Nguyen, Francisco Matias...
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    SIGCOMM
    1995
    ACM
    101views Communications» more  SIGCOMM 1995»
    Pipelined Memory Shared Buffer for VLSI Switches
    13 years 11 months ago
    Pipelined Memory Shared Buffer for VLSI Switches
    Download  conferences.sigcomm.org
    ABSTRACT: Switch chips are building blocks for computer and communication systems. Switches need internal buffering, because of output contention; shared buffering is known to perf...
    Manolis Katevenis, Panagiota Vatsolaki, Aristides ...
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