Increases in delay due to coupling can have a dramatic impact on IC performance for deep submicron technologies. To achieve maximum performance there is a need for analyzing logic...
Paul D. Gross, Ravishankar Arunachalam, Karthik Ra...
We present an improved data model that reflects the whole VLSI design process including bottom-up and topdown design phases. The kernel of the model is a static version concept th...
This paper presents computer simulations which investigate the effect that different group sizes have on the emergence of compositional structures in languages. The simulations are...
Chaining can reduce the number of iterations required for symbolic state-space generation and model-checking, especially in Petri nets and similar asynchronous systems, but require...
Ming-Ying Chung, Gianfranco Ciardo, Andy Jinqing Y...
A central issue in relational learning is the choice of an appropriate bias for limiting first-order induction. The purpose of this study is to circumvent this issue within a unifo...