16 search results - page 1 / 4 » Coordinated power management of voltage islands in CMPs |
SIGMETRICS
2010
ACM
14 years 7 days ago
2010
ACM
Multiple clock domain architectures have recently been proposed to alleviate the power problem in CMPs by having different frequency/voltage values assigned to each domain based o...
ICCD
2007
IEEE
14 years 4 months ago
2007
IEEE
Parameter variations are a major factor causing powerperformance asymmetry in chip multiprocessors. In this paper, we analyze the effects of with-in-die (WID) process variations o...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
Designers are moving toward chip-multiprocessors (CMPs) to leverage application parallelism for higher performance while keeping design complexity under control. However, to date,...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
The ability to do fine grain power management via local voltage selection has shown much promise via the use of Voltage/ Frequency Islands (VFIs). VFI-based designs combine the a...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...