275 search results - page 24 / 55 » Core architecture optimization for heterogeneous chip multip... |
DAC
2007
ACM
14 years 9 months ago
2007
ACM
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...
EUROPAR
2010
Springer
13 years 8 months ago
2010
Springer
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
A generic and retargetable tool flow is presented that enables the export of timing data from software running on a cycle-accurate Virtual Prototype (VP) to a concurrent function...
PPL
2008
13 years 8 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
ASPLOS
2011
ACM
13 years 7 days ago
2011
ACM
Multicore processors have become ubiquitous in today’s systems, but exploiting the parallelism they offer remains difficult, especially for legacy application and applications ...