275 search results - page 38 / 55 » Core architecture optimization for heterogeneous chip multip... |
ICPPW
2009
IEEE
14 years 3 months ago
2009
IEEE
Abstract— The migration away from power-hungry, speculative execution procesors towards manycore architectures is good news for the embedded and real-time systems community. Comm...
MICRO
2009
IEEE
14 years 3 months ago
2009
IEEE
Aggressive prefetching is very beneficial for memory latency tolerance of many applications. However, it faces significant challenges in multi-core systems. Prefetchers of diff...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...
ATS
2001
IEEE
14 years 8 days ago
2001
IEEE
Testing and diagnosis are important issues in system-onchip (SOC) development, as more and more embedded cores are being integrated into the chips. In this paper we propose a buil...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
We present a SAT-based approach to the task and message allocation problem of distributed real-time systems with hierarchical architectures. In contrast to the heuristic approache...