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JOC
2010
92views more  JOC 2010»
13 years 2 months ago
Efficient Cache Attacks on AES, and Countermeasures
We describe several software side-channel attacks based on inter-process leakage through the state of the CPU's memory cache. This leakage reveals memory access patterns, whic...
Eran Tromer, Dag Arne Osvik, Adi Shamir
MICRO
2003
IEEE
166views Hardware» more  MICRO 2003»
14 years 28 days ago
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pa...
ISCA
1998
IEEE
129views Hardware» more  ISCA 1998»
13 years 12 months ago
Memory System Characterization of Commercial Workloads
Commercial applications such as databases and Web servers constitute the largest and fastest-growing segment of the market for multiprocessor servers. Ongoing innovations in disk ...
Luiz André Barroso, Kourosh Gharachorloo, E...
ANCS
2008
ACM
13 years 9 months ago
A remotely accessible network processor-based router for network experimentation
Over the last decade, programmable Network Processors (NPs) have become widely used in Internet routers and other network components. NPs enable rapid development of complex packe...
Charlie Wiseman, Jonathan S. Turner, Michela Becch...
IPSN
2010
Springer
14 years 2 months ago
Lakon: a middle-ground approach to high-frequency data acquisition and in-network processing in sensor networks
The need for high-frequency signal acquisition and processing is becoming increasingly prevalent in sensor networks. Applications that require high-frequency data sampling are pre...
Prashanth G. Reddy, Nigamanth Sridhar