548 search results - page 23 / 110 » Core-Selectability in Chip Multiprocessors |
214
Voted
CAL
2010
15 years 1 months ago
2010
This paper describes dynamic pressure-aware associative placement (DPAP), a novel distributed cache management scheme for large-scale chip multiprocessors. Our work is motivated by...
115
Voted
HPCA
2006
IEEE
16 years 4 months ago
2006
IEEE
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
129
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IEEEPACT
2008
IEEE
15 years 10 months ago
2008
IEEE
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
138
Voted
ISCA
2003
IEEE
15 years 9 months ago
2003
IEEE
To address the increasing susceptibility of commodity chip multiprocessors (CMPs) to transient faults, we propose Chiplevel Redundantly Threaded multiprocessor with Recovery (CRTR...
136
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ICS
2001
Tsinghua U.
15 years 8 months ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...