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» Core-Selectability in Chip Multiprocessors
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SAMOS
2010
Springer
15 years 2 months ago
Interleaving granularity on high bandwidth memory architecture for CMPs
—Memory bandwidth has always been a critical factor for the performance of many data intensive applications. The increasing processor performance, and the advert of single chip m...
Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex...
CSC
2010
15 years 2 months ago
An Evaluation of Parallel Knapsack Algorithms on Multicore Architectures
Emergence of chip multiprocessor systems has dramatically increased the performance potential of computer systems. Since the amount of exploited parallelism is directly influenced ...
Hammad Rashid, Clara Novoa, Apan Qasem
ARCS
2012
Springer
13 years 11 months ago
Fast Scenario-Based Design Space Exploration using Feature Selection
: This paper presents a novel approach to efficiently perform early system level design space exploration (DSE) of MultiProcessor System-on-Chip (MPSoC) based embedded systems. By...
Peter van Stralen, Andy D. Pimentel
EUROSYS
2007
ACM
16 years 1 months ago
Thread clustering: sharing-aware scheduling on SMP-CMP-SMT multiprocessors
The major chip manufacturers have all introduced chip multiprocessing (CMP) and simultaneous multithreading (SMT) technology into their processing units. As a result, even low-end...
David K. Tam, Reza Azimi, Michael Stumm
HPCA
2007
IEEE
16 years 4 months ago
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of powe...
Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlk...