Sciweavers

237 search results - page 25 / 48
» Cost-Efficient Memory Architecture Design of NAND Flash Memo...
Sort
View
DAC
2004
ACM
14 years 8 months ago
An integrated hardware/software approach for run-time scratchpad management
An ever increasing number of dynamic interactive applications are implemented on portable consumer electronics. Designers depend largely on operating systems to map these applicat...
Francesco Poletti, Paul Marchal, David Atienza, Lu...
DAC
2007
ACM
14 years 8 months ago
Reducing Data-Memory Footprint of Multimedia Applications by Delay Redistribution
It is now common for multimedia applications to be partitioned and mapped onto multiple processing elements of a system-on-chip architecture. An important design constraint in suc...
Balaji Raman, Samarjit Chakraborty, Wei Tsang Ooi,...
CASES
2001
ACM
13 years 11 months ago
Energy-efficient instruction cache using page-based placement
Energy consumption is a crucial factor in designing batteryoperated embedded and mobile systems. The memory system is a major contributor to the system energy in such environments...
Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. K...
CASES
2003
ACM
14 years 29 days ago
Polynomial-time algorithm for on-chip scratchpad memory partitioning
Focusing on embedded applications, scratchpad memories (SPMs) look like a best-compromise solution when taking into account performance, energy consumption and die area. The main ...
Federico Angiolini, Luca Benini, Alberto Caprara
DAC
1999
ACM
14 years 1 days ago
Microprocessor Based Testing for Core-Based System on Chip
The purpose of this paper is to develop a exible design for test methodology for testing a core-based system on chip SOC. The novel feature of the approach is the use an embedde...
Christos A. Papachristou, F. Martin, Mehrdad Noura...