46 search results - page 7 / 10 » Cox-Rower Architecture for Fast Parallel Montgomery Multipli... |
ASAP
2008
IEEE
14 years 2 months ago
2008
IEEE
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
ASAP
2000
IEEE
13 years 12 months ago
2000
IEEE
MicroSIMD architectures incorporating subword parallelism are very efficient for application-specific media processors as well as for fast multimedia information processing in gen...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
In traditional parallel co-simulation approaches, the simulation speed is heavily limited by time synchronization overhead between simulators and idle time caused by data dependen...
PDP
2011
IEEE
12 years 11 months ago
2011
IEEE
—This paper proposes a parallelization scheme for parameter sweep (PS) applications using the compute unified device architecture (CUDA). Our scheme focuses on PS applications w...
HPCA
2005
IEEE
14 years 7 months ago
2005
IEEE
Dynamic voltage and frequency scaling (DVFS) is a widely-used method for energy-efficient computing. In this paper, we present a new intra-task online DVFS scheme for multiple clo...