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DAC
2010
ACM
13 years 7 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
14 years 4 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...
SAMOS
2004
Springer
14 years 1 months ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
RTAS
1999
IEEE
13 years 12 months ago
Timing Constraint Remapping to Avoid Time Discontinuities in Distributed Real-Time Systems
In this paper we propose a dynamic constraint transformation technique for ensuring timing requirements in a distributed real-time system possessing periodically synchronized dist...
Minsoo Ryu, Jungkeun Park, Seongsoo Hong
CI
2011
93views more  CI 2011»
13 years 2 months ago
Supporting clinical processes and decisions by hierarchical planning and scheduling
This paper is focused on how a general-purpose hierarchical planning representation, based on the HTN paradigm, can be used to support the representation of oncology treatment pro...
Juan Fernández-Olivares, Luis A. Castillo, ...