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ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
14 years 4 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
SC
2000
ACM
13 years 12 months ago
Performance Modeling and Tuning of an Unstructured Mesh CFD Application
This paper describes performance tuning experiences with a three-dimensional unstructured grid Euler flow code from NASA, which we have reimplemented in the PETSc framework and p...
William Gropp, Dinesh K. Kaushik, David E. Keyes, ...
DPD
2006
98views more  DPD 2006»
13 years 7 months ago
GRACE-based joins on active storage devices
Contemporary long-term storage devices feature powerful embedded processors and sizeable memory buffers. Active Storage Devices (ASD) is the hard disk technology that makes use of ...
Vassilis Stoumpos, Alex Delis
ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
14 years 12 days ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...
IPPS
2008
IEEE
14 years 1 months ago
High-speed string searching against large dictionaries on the Cell/B.E. Processor
Our digital universe is growing, creating exploding amounts of data which need to be searched, protected and filtered. String searching is at the core of the tools we use to curb...
Daniele Paolo Scarpazza, Oreste Villa, Fabrizio Pe...