86 search results - page 7 / 18 » Custom Data Layout for Memory Parallelism |
PLDI
2009
ACM
14 years 2 months ago
2009
ACM
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
IPPS
1998
IEEE
13 years 11 months ago
1998
IEEE
The increasing gap in processor and memory speeds has forced microprocessors to rely on deep cache hierarchies to keep the processors from starving for data. For many applications...
PLDI
1995
ACM
13 years 11 months ago
1995
ACM
We present a unified approach to locality optimization that employs both data and control transformations. Data transformations include changing the array layout in memory. Contr...
ISCA
1998
IEEE
13 years 11 months ago
1998
IEEE
Future parallel computers must efficiently execute not only hand-coded applications but also programs written in high-level, parallel programming languages. Today's machines ...
ISPASS
2007
IEEE
14 years 1 months ago
2007
IEEE
Address re-mapping techniques in so-called active memory systems have been shown to dramatically increase the performance of applications with poor cache and/or communication beha...