72 search results - page 4 / 15 » Custom Processor Core Construction from C Code |
ISCA
2011
IEEE
13 years 8 days ago
2011
IEEE
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
A system-on-chip lock cache (SoCLC) is an intellectual property (IP) core that provides effective lock synchronization in a heterogeneous multiprocessor shared-memory system-on-ac...
FPL
2009
Springer
14 years 13 days ago
2009
Springer
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a software-like...
ICCD
2007
IEEE
14 years 5 months ago
2007
IEEE
Parameter variations are a major factor causing powerperformance asymmetry in chip multiprocessors. In this paper, we analyze the effects of with-in-die (WID) process variations o...
FCCM
2011
IEEE
13 years 9 days ago
2011
IEEE
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...