25 search results - page 3 / 5 » DFFT : Design For Functional Testability |
SODA
2004
ACM
13 years 9 months ago
2004
ACM
Let H be a fixed graph on h vertices. We say that a graph G is induced H-free if it does not contain any induced copy of H. Let G be a graph on n vertices and suppose that at leas...
ET
2002
13 years 7 months ago
2002
LVDS is the acronym for Low-Voltage-DifferentialSignaling and is described in both the ANSI/TIA/EIA644 and IEEE 1596.3 standards. High performance yet Low Power and EMI have made ...
ICTAI
2002
IEEE
14 years 19 days ago
2002
IEEE
In order to reduce the time-to-market and simplify gatelevel test generation for digital integrated circuits, GAbased functional test generation techniques are proposed for behavi...
ASPDAC
2005
ACM
14 years 1 months ago
2005
ACM
- This paper presents a comparison between three different high-level modeling approaches for embedded systems design, focusing on systems that require dataflow models. The propose...
DATE
1999
IEEE
14 years 14 hour ago
1999
IEEE
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...