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HPCA
2000
IEEE
14 years 17 hour ago
Coherence Communication Prediction in Shared-Memory Multiprocessors
Abstract—Sharing patterns in shared-memory multiprocessors are the key to performance: uniprocessor latencytolerating techniques such as out-of-order execution and non-blocking c...
Stefanos Kaxiras, Cliff Young
ISCA
2000
IEEE
90views Hardware» more  ISCA 2000»
13 years 12 months ago
A scalable approach to thread-level speculation
While architects understandhow to build cost-effective parallel machines across a wide spectrum of machine sizes (ranging from within a single chip to large-scale servers), the re...
J. Gregory Steffan, Christopher B. Colohan, Antoni...
FCCM
1999
IEEE
122views VLSI» more  FCCM 1999»
13 years 12 months ago
Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor
Technology scaling of CMOS processes brings relatively faster transistors (gates) and slower interconnects (wires), making viable the addition of reconfigurability to increase per...
Andrew A. Chien, Jay H. Byun
HIPEAC
2009
Springer
13 years 11 months ago
Deriving Efficient Data Movement from Decoupled Access/Execute Specifications
Abstract. On multi-core architectures with software-managed memories, effectively orchestrating data movement is essential to performance, but is tedious and error-prone. In this p...
Lee W. Howes, Anton Lokhmotov, Alastair F. Donalds...
AINA
2004
IEEE
13 years 11 months ago
Can Streaming Of Stored Playback Video Be Supported On Peer to Peer Infrastructure?
Streaming live video over peers in the Internet is gaining popularity since it has the advantage of reducing the load on the server and enable the server to perform other speciali...
K. Kalapriya, S. K. Nandy, K. Venkatesh Babu