103 search results - page 13 / 21 » DPA Leakage Models for CMOS Logic Circuits |
CSREAESA
2004
13 years 9 months ago
2004
- The model of a simple perceptron using phase-encoded inputs and complex-valued weights is presented. Multilayer two-input and three-input complex-valued neurons (CVNs) are implem...
MJ
2007
13 years 7 months ago
2007
Recent algorithmic advances in Boolean satisfiability (SAT), along with highly efficient solver implementations, have enabled the successful deployment of SAT technology in a wi...
ICCAD
1996
IEEE
13 years 11 months ago
1996
IEEE
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— A new operation mode using a partially depleted hybrid lateral BJT-CMOS inverter on SOI, named as a new unified-BiCMOS (U-BiCMOS) inverter, is proposed. The scheme utilizes the...
IJCSS
2007
13 years 7 months ago
2007
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...