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» DRAMSim2: A Cycle Accurate Memory System Simulator
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VTC
2007
IEEE
14 years 1 months ago
Modeling UpLink Power Control with Outage Probabilities
We investigate models for uplink interference in wireless systems. Our models account for the effects of outage probabilities. Such an accounting requires a nonlinear, even nonco...
Kenneth L. Clarkson, K. Georg Hampel, John D. Hobb...
EUROSYS
2011
ACM
12 years 11 months ago
Scarlett: coping with skewed content popularity in mapreduce clusters
To improve data availability and resilience MapReduce frameworks use file systems that replicate data uniformly. However, analysis of job logs from a large production cluster show...
Ganesh Ananthanarayanan, Sameer Agarwal, Srikanth ...
SIGMETRICS
2011
ACM
178views Hardware» more  SIGMETRICS 2011»
12 years 10 months ago
Soft error benchmarking of L2 caches with PARMA
The amount of charge stored in an SRAM cell shrinks rapidly with each technology generation thus increasingly exposing caches to soft errors. Benchmarking the FIT rate of caches d...
Jinho Suh, Mehrtash Manoochehri, Murali Annavaram,...
IISWC
2008
IEEE
14 years 1 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
ICPP
2009
IEEE
14 years 2 months ago
Bank-aware Dynamic Cache Partitioning for Multicore Architectures
Abstract—As Chip-Multiprocessor systems (CMP) have become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single c...
Dimitris Kaseridis, Jeffrey Stuecheli, Lizy K. Joh...